Macros | |
| #define | I2S_FLAG_TXE I2S_INT_STATUS_TX_FIFO_UNDERFLOW |
| #define | I2S_FLAG_RXNE I2S_INT_STATUS_RX_FIFO_OVERFLOW |
| #define | I2S_FIFO_TX_FULL (1<<7) |
| #define | I2S_FIFO_TX_EMPTY (1<<6) |
| #define | I2S_FIFO_TX_AMFULL (1<<5) |
| #define | I2S_FIFO_TX_AMEMPTY (1<<4) |
| #define | I2S_FIFO_RX_FULL (1<<3) |
| #define | I2S_FIFO_RX_EMPTY (1<<2) |
| #define | I2S_FIFO_RX_AMFULL (1<<1) |
| #define | I2S_FIFO_RX_AMEMPTY (1<<0) |
| #define I2S_FIFO_RX_AMEMPTY (1<<0) |
I2S STATUS Rx almost empty
| #define I2S_FIFO_RX_AMFULL (1<<1) |
I2S STATUS Rx almost full
| #define I2S_FIFO_RX_EMPTY (1<<2) |
I2S STATUS Rx empty
| #define I2S_FIFO_RX_FULL (1<<3) |
I2S STATUS Rx full
| #define I2S_FIFO_TX_AMEMPTY (1<<4) |
I2S STATUS Tx almost empty
| #define I2S_FIFO_TX_AMFULL (1<<5) |
I2S STATUS Tx almost full
| #define I2S_FIFO_TX_EMPTY (1<<6) |
I2S STATUS Tx empty
| #define I2S_FIFO_TX_FULL (1<<7) |
I2S STATUS Tx full
| #define I2S_FLAG_RXNE I2S_INT_STATUS_RX_FIFO_OVERFLOW |
I2S STATUS RX NOT EMPTY
| #define I2S_FLAG_TXE I2S_INT_STATUS_TX_FIFO_UNDERFLOW |
I2S STATUS TX EMPTY