MAILBOX Exported Macros

Macros
#define	__HAL_MAILBOX_MASK_CHANNEL_IT(__HANDLE__, __CHINDEX__)   ((__HANDLE__)->Instance->CxIER &= ~(MAILBOX_C1IER_INT0_Msk << (__CHINDEX__)))
	Mask the specified interrupt. More...
#define	__HAL_MAILBOX_UNMASK_CHANNEL_IT(__HANDLE__, __CHINDEX__)   ((__HANDLE__)->Instance->CxIER |= (MAILBOX_C1IER_INT0_Msk << (__CHINDEX__)))
	Unmask the specified interrupt. More...
#define	__HAL_MAILBOX_TRIGGER_CHANNEL_IT(__HANDLE__, __CHINDEX__)   ((__HANDLE__)->Instance->CxITR |= (MAILBOX_C1ITR_INT0_Msk << (__CHINDEX__)))
	Trigger the specified interrupt. More...
#define	__HAL_MAILBOX_CLEAR_CHANNEL_IT(__HANDLE__, __CHINDEX__)   ((__HANDLE__)->Instance->CxICR |= (MAILBOX_C1ICR_INT0_Msk << (__CHINDEX__)))
	Clear the specified interrupt. More...
#define	__HAL_MAILBOX_GET_STATUS(__HANDLE__)   ((__HANDLE__)->Instance->CxMISR)
	get the masked ISR status More...
#define	__HAL_MAILBOX_CLEAR_STATUS(__HANDLE__, __STATUS__)   ((__HANDLE__)->Instance->CxICR = (__STATUS__))
	clear the ISR status More...

Detailed Description

Macro Definition Documentation

__HAL_MAILBOX_CLEAR_CHANNEL_IT

#define __HAL_MAILBOX_CLEAR_CHANNEL_IT	(		__HANDLE__,
			__CHINDEX__
	)		((__HANDLE__)->Instance->CxICR |= (MAILBOX_C1ICR_INT0_Msk << (__CHINDEX__)))

Clear the specified interrupt.

Parameters

__HANDLE__	specifies the MAILBOX Handle
__CHINDEX__	specifies the channels number : This parameter can be one of the following values (MAILBOX Channel): MAILBOX_CHANNEL_1: MAILBOX Channel 1 MAILBOX_CHANNEL_2: MAILBOX Channel 2 MAILBOX_CHANNEL_3: MAILBOX Channel 3 MAILBOX_CHANNEL_4: MAILBOX Channel 4 MAILBOX_CHANNEL_5: MAILBOX Channel 5 MAILBOX_CHANNEL_6: MAILBOX Channel 6

__HAL_MAILBOX_CLEAR_STATUS

#define __HAL_MAILBOX_CLEAR_STATUS	(		__HANDLE__,
			__STATUS__
	)		((__HANDLE__)->Instance->CxICR = (__STATUS__))

clear the ISR status

Parameters

__HANDLE__	specifies the MAILBOX Handle
__STATUS__	status value to be cleared

__HAL_MAILBOX_GET_STATUS

#define __HAL_MAILBOX_GET_STATUS

(

__HANDLE__

)

((__HANDLE__)->Instance->CxMISR)

get the masked ISR status

Parameters

__HANDLE__

specifies the MAILBOX Handle

Return values

masked

ISR status, uint32_t type

__HAL_MAILBOX_MASK_CHANNEL_IT

#define __HAL_MAILBOX_MASK_CHANNEL_IT	(		__HANDLE__,
			__CHINDEX__
	)		((__HANDLE__)->Instance->CxIER &= ~(MAILBOX_C1IER_INT0_Msk << (__CHINDEX__)))

Mask the specified interrupt.

Parameters

__HANDLE__	specifies the MAILBOX Handle
__CHINDEX__	specifies the channels number: This parameter can be one of the following values (MAILBOX Channel): MAILBOX_CHANNEL_1: MAILBOX Channel 1 MAILBOX_CHANNEL_2: MAILBOX Channel 2 MAILBOX_CHANNEL_3: MAILBOX Channel 3 MAILBOX_CHANNEL_4: MAILBOX Channel 4 MAILBOX_CHANNEL_5: MAILBOX Channel 5 MAILBOX_CHANNEL_6: MAILBOX Channel 6

__HAL_MAILBOX_TRIGGER_CHANNEL_IT

#define __HAL_MAILBOX_TRIGGER_CHANNEL_IT	(		__HANDLE__,
			__CHINDEX__
	)		((__HANDLE__)->Instance->CxITR |= (MAILBOX_C1ITR_INT0_Msk << (__CHINDEX__)))

Trigger the specified interrupt.

Parameters

__HANDLE__	specifies the MAILBOX Handle
__CHINDEX__	specifies the channels number : This parameter can be one of the following values (MAILBOX Channel): MAILBOX_CHANNEL_1: MAILBOX Channel 1 MAILBOX_CHANNEL_2: MAILBOX Channel 2 MAILBOX_CHANNEL_3: MAILBOX Channel 3 MAILBOX_CHANNEL_4: MAILBOX Channel 4 MAILBOX_CHANNEL_5: MAILBOX Channel 5 MAILBOX_CHANNEL_6: MAILBOX Channel 6

__HAL_MAILBOX_UNMASK_CHANNEL_IT

#define __HAL_MAILBOX_UNMASK_CHANNEL_IT	(		__HANDLE__,
			__CHINDEX__
	)		((__HANDLE__)->Instance->CxIER |= (MAILBOX_C1IER_INT0_Msk << (__CHINDEX__)))

Unmask the specified interrupt.

Parameters

__HANDLE__	specifies the MAILBOX Handle
__CHINDEX__	specifies the channels number: This parameter can be one of the following values (MAILBOX Channel): MAILBOX_CHANNEL_1: MAILBOX Channel 1 MAILBOX_CHANNEL_2: MAILBOX Channel 2 MAILBOX_CHANNEL_3: MAILBOX Channel 3 MAILBOX_CHANNEL_4: MAILBOX Channel 4 MAILBOX_CHANNEL_5: MAILBOX Channel 5 MAILBOX_CHANNEL_6: MAILBOX Channel 6